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authorDiederik de Haas <didi.debian@cknow.org>2025-07-09 15:15:14 +0200
committerHeiko Stuebner <heiko@sntech.de>2025-07-15 13:07:26 +0200
commit98921ad2494a85aa7edde33a3a478b9ae3d621ef (patch)
treec91835965895f0f81fd7d230ee17f50149356a01
parentarm64: dts: rockchip: Fix UART DMA support for RK3528 (diff)
downloadwireguard-linux-98921ad2494a85aa7edde33a3a478b9ae3d621ef.tar.xz
wireguard-linux-98921ad2494a85aa7edde33a3a478b9ae3d621ef.zip
arm64: dts: rockchip: Move dsi address+size-cells from SoC to px30 boards
The #address-cells and #size-cells properties are not useful on the DSI controller node; they are only useful/required on ports and panel(s). So remove them from the controller node and add them where actually needed on the various px30 based boards, which includes rk3326. This fixes the following DTB validation warnings: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250709132323.128757-2-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts2
-rw-r--r--arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts2
-rw-r--r--arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts2
-rw-r--r--arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts2
-rw-r--r--arch/arm64/boot/dts/rockchip/px30-evb.dts2
-rw-r--r--arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts2
-rw-r--r--arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts2
-rw-r--r--arch/arm64/boot/dts/rockchip/px30.dtsi2
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi2
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts2
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi2
11 files changed, 20 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts
index 1d26164be7b8..a31c61c8f148 100644
--- a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts
@@ -12,6 +12,8 @@
};
&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
panel@0 {
diff --git a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts
index 82c6acdb4fae..a3c6edfdb37c 100644
--- a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts
@@ -12,6 +12,8 @@
};
&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
panel@0 {
diff --git a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts
index 94449132df38..9b5eff392dfa 100644
--- a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts
@@ -12,6 +12,8 @@
};
&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
panel@0 {
diff --git a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts
index d7b639e7ccab..36b7cae49e31 100644
--- a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts
@@ -16,6 +16,8 @@
};
&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
panel@0 {
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts b/arch/arm64/boot/dts/rockchip/px30-evb.dts
index bfd724b73c9a..85d1642eb9be 100644
--- a/arch/arm64/boot/dts/rockchip/px30-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts
@@ -124,6 +124,8 @@
};
&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
ports {
diff --git a/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts b/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts
index b71929bcb33e..932721ffd470 100644
--- a/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts
@@ -12,6 +12,8 @@
};
&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
panel@0 {
diff --git a/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts b/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts
index a9bd5936c701..70adf091371c 100644
--- a/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts
@@ -12,6 +12,8 @@
};
&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
panel@0 {
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 0cad83c5d5fe..5034ad8019a8 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1137,8 +1137,6 @@
resets = <&cru SRST_MIPIDSI_HOST_P>;
reset-names = "apb";
rockchip,grf = <&grf>;
- #address-cells = <1>;
- #size-cells = <0>;
status = "disabled";
ports {
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi
index 150fadcb0b3c..54395a40b087 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi
@@ -118,6 +118,8 @@
};
&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
ports {
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts b/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts
index 10e6ab724ac4..4d306085646c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts
@@ -322,6 +322,8 @@
};
&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
internal_display: panel@0 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi
index 446a1a6c12e7..bf4554eff47d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi
@@ -220,6 +220,8 @@
};
&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
ports {