diff options
| author |   Suman Anna <s-anna@ti.com> | 2020-07-23 16:11:37 -0500 |
|---|---|---|
| committer |   Nishanth Menon <nm@ti.com> | 2020-08-31 06:30:35 -0500 |
| commit | 995504b6fa47005d20104f20922e65e4ad8d3e50 (patch) | |
| tree | 6f7e7eba656d846658a671890b8216881c92a6dd | |
| parent | arm64: dts: ti: k3-am65: Fix interconnect node names (diff) | |
| download | wireguard-linux-995504b6fa47005d20104f20922e65e4ad8d3e50.tar.xz wireguard-linux-995504b6fa47005d20104f20922e65e4ad8d3e50.zip | |
arm64: dts: ti: k3-j721e: Fix interconnect node names
The various CBASS interconnect nodes on K3 J721E SoCs are defined
using the node name "interconnect". This is not a valid node name
as per the dt-schema. Fix these node names to use the standard name
used for SoC interconnects, "bus".
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20200723211137.26641-3-s-anna@ti.com
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j721e.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index d035b61e0e16..f787aa73aaae 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -120,7 +120,7 @@ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; }; - cbass_main: interconnect@100000 { + cbass_main: bus@100000 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; @@ -155,7 +155,7 @@ <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; - cbass_mcu_wakeup: interconnect@28380000 { + cbass_mcu_wakeup: bus@28380000 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; |