diff options
| author |   Oder Chiou <oder_chiou@realtek.com> | 2020-03-23 16:25:45 +0800 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2020-03-23 18:17:23 +0000 |
| commit | 9a74c44a6f675e4e991437eee39496109b601629 (patch) | |
| tree | e5da9a56c6b3977aef963f5c894580fd18bc2688 | |
| parent | ASoC: MT6660: make spdxcheck.py happy (diff) | |
| download | wireguard-linux-9a74c44a6f675e4e991437eee39496109b601629.tar.xz wireguard-linux-9a74c44a6f675e4e991437eee39496109b601629.zip | |
ASoC: rt5682: Add a property for DMIC clock rate
The patch adds a property for DMIC clock rate (hz) and changes the
default to the common optimize DMIC clock rate.
Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Link: https://lore.kernel.org/r/20200323082547.7898-1-oder_chiou@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | include/sound/rt5682.h | 1 | ||||
| -rw-r--r-- | sound/soc/codecs/rt5682.c | 9 |
2 files changed, 8 insertions, 2 deletions
diff --git a/include/sound/rt5682.h b/include/sound/rt5682.h index 6bf0e3581056..96b268ac96bd 100644 --- a/include/sound/rt5682.h +++ b/include/sound/rt5682.h @@ -38,6 +38,7 @@ struct rt5682_platform_data { enum rt5682_dmic1_clk_pin dmic1_clk_pin; enum rt5682_jd_src jd_src; unsigned int btndet_delay; + unsigned int dmic_clk_rate; const char *dai_clk_names[RT5682_DAI_NUM_CLKS]; }; diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c index 513429478d27..cc00d47895b5 100644 --- a/sound/soc/codecs/rt5682.c +++ b/sound/soc/codecs/rt5682.c @@ -1231,10 +1231,13 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w, struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); - int idx = -EINVAL; + int idx = -EINVAL, dmic_clk_rate = 3072000; static const int div[] = {2, 4, 6, 8, 12, 16, 24, 32, 48, 64, 96, 128}; - idx = rt5682_div_sel(rt5682, 1500000, div, ARRAY_SIZE(div)); + if (rt5682->pdata.dmic_clk_rate) + dmic_clk_rate = rt5682->pdata.dmic_clk_rate; + + idx = rt5682_div_sel(rt5682, dmic_clk_rate, div, ARRAY_SIZE(div)); snd_soc_component_update_bits(component, RT5682_DMIC_CTRL_1, RT5682_DMIC_CLK_MASK, idx << RT5682_DMIC_CLK_SFT); @@ -3231,6 +3234,8 @@ static int rt5682_parse_dt(struct rt5682_priv *rt5682, struct device *dev) &rt5682->pdata.jd_src); device_property_read_u32(dev, "realtek,btndet-delay", &rt5682->pdata.btndet_delay); + device_property_read_u32(dev, "realtek,dmic-clk-rate-hz", + &rt5682->pdata.dmic_clk_rate); rt5682->pdata.ldo1_en = of_get_named_gpio(dev->of_node, "realtek,ldo1-en-gpios", 0); |