diff options
author | 2025-03-22 14:39:00 -0400 | |
---|---|---|
committer | 2025-04-07 15:18:32 -0400 | |
commit | 9aadb02fa2ecf9cc38534c6d203f61126c5a66d7 (patch) | |
tree | 41144a892ec3f738fe5132e19a2b0e4147dbd7a0 | |
parent | drm/amdgpu: move X_GB_ADDR_CONFIG_GOLDEN in GFX7 (diff) | |
download | wireguard-linux-9aadb02fa2ecf9cc38534c6d203f61126c5a66d7.tar.xz wireguard-linux-9aadb02fa2ecf9cc38534c6d203f61126c5a66d7.zip |
drm/radeon: fix MAX_POWER_SHIFT value
While I don't think it is being used anywhere, if it were used, it would
be wrong. We can base this assumption on MAX_POWER_MASK, where the shift is
by 16 bits.
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/radeon/sid.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 65a911ddd509..f9267b026f8d 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h @@ -1109,7 +1109,7 @@ #define MIN_POWER_SHIFT 0 #define MAX_POWER(x) ((x) << 16) #define MAX_POWER_MASK (0x3fff << 16) -#define MAX_POWER_SHIFT 0 +#define MAX_POWER_SHIFT 16 #define SQ_POWER_THROTTLE2 0x8e5c #define MAX_POWER_DELTA(x) ((x) << 0) #define MAX_POWER_DELTA_MASK (0x3fff << 0) |