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| author |   Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2025-02-04 19:01:00 +0200 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2025-02-05 09:59:13 +0200 |
| commit | a1e062ab4a1f19bb0e94093ef90ab9a74f1f7744 (patch) | |
| tree | 7c7e8017aa2a370c8048ecc47c3fca05901ef0bc | |
| parent | pwm: lpss: Actually use a module namespace by defining the namespace earlier (diff) | |
| download | wireguard-linux-a1e062ab4a1f19bb0e94093ef90ab9a74f1f7744.tar.xz wireguard-linux-a1e062ab4a1f19bb0e94093ef90ab9a74f1f7744.zip | |
MAINTAINERS: Add pin control and GPIO to the Intel MID record
Intel MID record is not listed all related files. Add to there
pin control and GPIO drivers along with HSU (High Speed UART)
and HSU DMA.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| -rw-r--r-- | MAINTAINERS | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 896a307fa065..f6b806993b4f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11846,12 +11846,19 @@ S: Supported F: arch/x86/include/asm/intel-mid.h F: arch/x86/pci/intel_mid_pci.c F: arch/x86/platform/intel-mid/ +F: drivers/dma/hsu/ F: drivers/extcon/extcon-intel-mrfld.c +F: drivers/gpio/gpio-merrifield.c +F: drivers/gpio/gpio-tangier.* F: drivers/iio/adc/intel_mrfld_adc.c F: drivers/mfd/intel_soc_pmic_mrfld.c +F: drivers/pinctrl/intel/pinctrl-merrifield.c +F: drivers/pinctrl/intel/pinctrl-moorefield.c +F: drivers/pinctrl/intel/pinctrl-tangier.* F: drivers/platform/x86/intel/mrfld_pwrbtn.c F: drivers/platform/x86/intel_scu_* F: drivers/staging/media/atomisp/ +F: drivers/tty/serial/8250/8250_mid.c F: drivers/watchdog/intel-mid_wdt.c F: include/linux/mfd/intel_soc_pmic_mrfld.h F: include/linux/platform_data/x86/intel-mid_wdt.h |