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authorSean Christopherson <seanjc@google.com>2026-09-21 12:14:12 -0700
committerIngo Molnar <mingo@kernel.org>2026-09-22 11:09:45 +0200
commita391618e1d563f099e4c2a704f45d08329ccdf7c (patch)
treec536dff6fd03ab5a1704134e81bb5d05031630e5
parentperf/x86/intel: Don't pointlessly context switch DS_AREA (and PEBS config) if PEBS is unused (diff)
perf/x86/intel: Make @data a mandatory param for intel_guest_get_msrs()
Drop "support" for passing a NULL @data/@kvm_pmu param when getting guest MSRs. KVM, the only in-tree user, unconditionally passes a non-NULL pointer, and carrying code that suggests @data may be NULL is confusing, e.g. incorrectly implies that there are scenarios where KVM doesn't pass a PMU context. Fixes: 8183a538cd95 ("KVM: x86/pmu: Add IA32_DS_AREA MSR emulation to support guest DS") Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Jim Mattson <jmattson@google.com> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://patch.msgid.link/20260921191418.950933-5-seanjc@google.com
-rw-r--r--arch/x86/events/intel/core.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 75c74e8fe2f4..757d4082de60 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -5331,11 +5331,11 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr, void *data)
}
/*
- * If the guest won't use PEBS or the CPU doesn't support PEBS in the
- * guest, then there's nothing more to do as disabling PMCs via
- * PERF_GLOBAL_CTRL is sufficient on CPUs with guest/host isolation.
+ * If the CPU doesn't support PEBS in the guest, then there's nothing
+ * more to do as disabling PMCs via PERF_GLOBAL_CTRL is sufficient on
+ * CPUs with guest/host isolation.
*/
- if (!kvm_pmu || !x86_pmu.pebs_ept)
+ if (!x86_pmu.pebs_ept)
return arr;
/*