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authorSimon Horman <horms+renesas@verge.net.au>2015-11-09 10:33:19 +0900
committerSimon Horman <horms+renesas@verge.net.au>2015-11-10 09:12:48 +0900
commita81f05089aad81607bb4bcf9ccfb41ef4814d95e (patch)
treee5a606e8d73976d8088fdd5ef59ec640d8d5a33a
parentARM: shmobile: r8a7793: Add PFC to DT (diff)
downloadwireguard-linux-a81f05089aad81607bb4bcf9ccfb41ef4814d95e.tar.xz
wireguard-linux-a81f05089aad81607bb4bcf9ccfb41ef4814d95e.zip
ARM: shmobile: gose: Configure PFC in DT
Configure PFC for the already enabled scif and ethernet devices in the device tree for the gose board. Based on similar work for the koelsch board by Laurent Pinchart and Sergei Shtylyov. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-rw-r--r--arch/arm/boot/dts/r8a7793-gose.dts31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index 96443ec5f6ab..1575ef759047 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -37,7 +37,32 @@
clock-frequency = <20000000>;
};
+&pfc {
+ scif0_pins: serial0 {
+ renesas,groups = "scif0_data_d";
+ renesas,function = "scif0";
+ };
+
+ scif1_pins: serial1 {
+ renesas,groups = "scif1_data_d";
+ renesas,function = "scif1";
+ };
+
+ ether_pins: ether {
+ renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
+ renesas,function = "eth";
+ };
+
+ phy1_pins: phy1 {
+ renesas,groups = "intc_irq0";
+ renesas,function = "intc";
+ };
+};
+
&ether {
+ pinctrl-0 = <&ether_pins &phy1_pins>;
+ pinctrl-names = "default";
+
phy-handle = <&phy1>;
renesas,ether-link-active-low;
status = "okay";
@@ -55,9 +80,15 @@
};
&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
&scif1 {
+ pinctrl-0 = <&scif1_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};