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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-10-18 14:50:22 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-11-04 16:57:47 +0200 |
| commit | aaec72ee90bcccfffeb33feb8be826efa4065a7c (patch) | |
| tree | 2fa78a0d02e2e6270fdd032e8b6efa3649ad2b4f | |
| parent | drm/i915: Use intel_de_rmw() for icl combo phy programming (diff) | |
| download | wireguard-linux-aaec72ee90bcccfffeb33feb8be826efa4065a7c.tar.xz wireguard-linux-aaec72ee90bcccfffeb33feb8be826efa4065a7c.zip | |
drm/i915: Reject planar formats when doing async flips
Async flips are only capable of changing PLANE_SURF, hence we
they can't easily be used with planar formats.
Older platforms could require updating AUX_DIST as well, which
is not possible. We'd have to make sure AUX_DIST doesn't change
before allowing the async flip through. If we could get async
flips with CCS then that might be interesting, but since the hw
doesn't allow async flips with CCS I don't see much point in
allowing this for planar formats either. No one renders their
game content in YUV anyway.
icl+ could in theory do this I suppose since each color plane
has its own PLANE_SURF register, but I don't know if there is
some magic to guarantee that both the Y and UV plane would
async flip synchronously if you will. Ie. beyond just a clean
tear we'd potentially get some kind of weird tear with some
random mix of luma and chroma from the old and new frames.
So let's just say no to async flips when scanning out planar
formats.
Cc: Karthik B S <karthik.b.s@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018115030.3547-2-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 29392dfc46c8..09d19ea01cfc 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7775,6 +7775,12 @@ static int intel_atomic_check_async(struct intel_atomic_state *state, struct int return -EINVAL; } + if (new_plane_state->hw.fb->format->num_planes > 1) { + drm_dbg_kms(&i915->drm, + "Planar formats not supported with async flips\n"); + return -EINVAL; + } + if (old_plane_state->view.color_plane[0].mapping_stride != new_plane_state->view.color_plane[0].mapping_stride) { drm_dbg_kms(&i915->drm, "Stride cannot be changed in async flip\n"); |