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| author |   Andrew Jones <ajones@ventanamicro.com> | 2023-04-26 16:13:33 +0200 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2023-04-26 08:58:34 -0700 |
| commit | b09313dd2e726fe5e1fa574cd73f5e326c6030a4 (patch) | |
| tree | e693bc28d2c000ca1e07d6c91444c6b19cabb4e2 | |
| parent | RISC-V: hwprobe: There can only be one first (diff) | |
| download | wireguard-linux-b09313dd2e726fe5e1fa574cd73f5e326c6030a4.tar.xz wireguard-linux-b09313dd2e726fe5e1fa574cd73f5e326c6030a4.zip | |
RISC-V: hwprobe: Explicity check for -1 in vdso init
id_bitsmash is unsigned. We need to explicitly check for -1, rather
than use > 0.
Fixes: aa5af0aa90ba ("RISC-V: Add hwprobe vDSO function and data")
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Evan Green <evan@rivosinc.com>
Link: https://lore.kernel.org/r/20230426141333.10063-3-ajones@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| -rw-r--r-- | arch/riscv/kernel/sys_riscv.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c index c569dac7452e..5db29683ebee 100644 --- a/arch/riscv/kernel/sys_riscv.c +++ b/arch/riscv/kernel/sys_riscv.c @@ -282,7 +282,7 @@ static int __init init_hwprobe_vdso_data(void) * populated) or any value returns -1 (varies across CPUs), then the * vDSO should defer to the kernel for exotic cpu masks. */ - avd->homogeneous_cpus = (id_bitsmash > 0); + avd->homogeneous_cpus = id_bitsmash != 0 && id_bitsmash != -1; return 0; } |