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authorPaul Blakey <paulb@mellanox.com>2018-05-31 11:50:23 +0300
committerSaeed Mahameed <saeedm@mellanox.com>2018-10-17 14:15:48 -0700
commitb9aa0ba17af5afa13605eb6ea91f1974da97a2e2 (patch)
tree8a22a59349e5de8a083fd6512a3177a73443bf43
parentnet/mlx5e: Split TC add rule path for nic vs e-switch (diff)
downloadwireguard-linux-b9aa0ba17af5afa13605eb6ea91f1974da97a2e2.tar.xz
wireguard-linux-b9aa0ba17af5afa13605eb6ea91f1974da97a2e2.zip
net/mlx5: Add cap bits for multi fdb encap
If set, the firmware supports creating of flow tables with encap enabled while VFs are configured, if we already created one (restriction still applies on the first creation). Signed-off-by: Paul Blakey <paulb@mellanox.com> Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
-rw-r--r--include/linux/mlx5/mlx5_ifc.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 15e36198f85f..963611820006 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -584,7 +584,9 @@ struct mlx5_ifc_flow_table_nic_cap_bits {
struct mlx5_ifc_flow_table_eswitch_cap_bits {
u8 reserved_at_0[0x1c];
u8 fdb_multi_path_to_table[0x1];
- u8 reserved_at_1d[0x1e3];
+ u8 reserved_at_1d[0x1];
+ u8 multi_fdb_encap[0x1];
+ u8 reserved_at_1e[0x1e1];
struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;