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| author |   Aleksander Jan Bajkowski <olek2@wp.pl> | 2021-09-14 23:20:58 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2021-09-15 11:02:01 +0100 |
| commit | c12aa581f6d5e80c3c3675ab26a52c2b3b62f76e (patch) | |
| tree | 66346a54a3d788672e486f4a085b024a73d80bc5 | |
| parent | net: dsa: tag_rtl4_a: Drop bit 9 from egress frames (diff) | |
| download | wireguard-linux-c12aa581f6d5e80c3c3675ab26a52c2b3b62f76e.tar.xz wireguard-linux-c12aa581f6d5e80c3c3675ab26a52c2b3b62f76e.zip | |
MIPS: lantiq: dma: add small delay after reset
Reading the DMA registers immediately after the reset causes
Data Bus Error. Adding a small delay fixes this issue.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | arch/mips/lantiq/xway/dma.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c index 63dccb2ed08b..2784715933d1 100644 --- a/arch/mips/lantiq/xway/dma.c +++ b/arch/mips/lantiq/xway/dma.c @@ -11,6 +11,7 @@ #include <linux/export.h> #include <linux/spinlock.h> #include <linux/clk.h> +#include <linux/delay.h> #include <linux/err.h> #include <linux/of.h> @@ -222,6 +223,8 @@ ltq_dma_init(struct platform_device *pdev) clk_enable(clk); ltq_dma_w32_mask(0, DMA_RESET, LTQ_DMA_CTRL); + usleep_range(1, 10); + /* disable all interrupts */ ltq_dma_w32(0, LTQ_DMA_IRNEN); |