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| author |   Qiang Yu <yuq825@gmail.com> | 2020-03-28 17:16:32 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime@cerno.tech> | 2020-04-14 09:21:25 +0200 |
| commit | c21c2c86f6067d4d7c2bf5eab4940dd0c18dbecf (patch) | |
| tree | eb861ed2ea270ea31247d176042bdac60b595dc6 | |
| parent | arm64: dts: allwinner: a64: olinuxino: add user red LED (diff) | |
| download | wireguard-linux-c21c2c86f6067d4d7c2bf5eab4940dd0c18dbecf.tar.xz wireguard-linux-c21c2c86f6067d4d7c2bf5eab4940dd0c18dbecf.zip | |
ARM: dts: sun8i-h3: add opp table for mali gpu
OPP table value is get from orangepi lichee linux-3.4
kernel driver.
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
| -rw-r--r-- | arch/arm/boot/dts/sun8i-h3.dtsi | 24 |
1 files changed, 21 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index e83aa6866e7e..4e89701df91f 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -112,6 +112,26 @@ }; }; + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp-120000000 { + opp-hz = /bits/ 64 <120000000>; + }; + + opp-312000000 { + opp-hz = /bits/ 64 <312000000>; + }; + + opp-432000000 { + opp-hz = /bits/ 64 <432000000>; + }; + + opp-576000000 { + opp-hz = /bits/ 64 <576000000>; + }; + }; + pmu { compatible = "arm,cortex-a7-pmu"; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, @@ -205,9 +225,7 @@ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; clock-names = "bus", "core"; resets = <&ccu RST_BUS_GPU>; - - assigned-clocks = <&ccu CLK_GPU>; - assigned-clock-rates = <384000000>; + operating-points-v2 = <&gpu_opp_table>; }; ths: thermal-sensor@1c25000 { |