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| author |   Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> | 2025-06-26 11:02:38 +0200 |
|---|---|---|
| committer |   Rob Clark <robin.clark@oss.qualcomm.com> | 2025-07-04 17:48:40 -0700 |
| commit | caf5ad18a2b49e3b20b1dc65e928851d409bcd1c (patch) | |
| tree | 575cb7afbd0aef3372b060533e1a63ac58f95b2a | |
| parent | drm/msm/a6xx: Simplify min_acc_len calculation (diff) | |
| download | wireguard-linux-caf5ad18a2b49e3b20b1dc65e928851d409bcd1c.tar.xz wireguard-linux-caf5ad18a2b49e3b20b1dc65e928851d409bcd1c.zip | |
soc: qcom: ubwc: Fix SM6125's ubwc_swizzle value
The value of 7 (a.k.a. GENMASK(2, 0), a.k.a. disabling levels 1-3 of
swizzling) is what we want on this platform (and others with a UBWC
1.0 encoder).
Fix it to make mesa happy (the hardware doesn't care about the 2 higher
bits, as they weren't consumed on this platform).
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/660980/
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
| -rw-r--r-- | drivers/soc/qcom/ubwc_config.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c index 18a853a3f76c..3eb2f2118e5d 100644 --- a/drivers/soc/qcom/ubwc_config.c +++ b/drivers/soc/qcom/ubwc_config.c @@ -103,7 +103,7 @@ static const struct qcom_ubwc_cfg_data sm6115_data = { static const struct qcom_ubwc_cfg_data sm6125_data = { .ubwc_enc_version = UBWC_1_0, .ubwc_dec_version = UBWC_3_0, - .ubwc_swizzle = 1, + .ubwc_swizzle = 7, .highest_bank_bit = 14, }; |