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| author |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-06-05 10:09:30 +0200 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2024-06-12 23:03:13 -0500 |
| commit | cc9d138fffbaebe7c3f37f9e03b2d1840efa2af6 (patch) | |
| tree | afbbcd0a2426f8f22a231d8c9d9a1af1d5ea6a65 | |
| parent | dt-bindings: clock: qcom,videocc: reference qcom,gcc.yaml (diff) | |
| download | wireguard-linux-cc9d138fffbaebe7c3f37f9e03b2d1840efa2af6.tar.xz wireguard-linux-cc9d138fffbaebe7c3f37f9e03b2d1840efa2af6.zip | |
dt-bindings: clock: qcom,dispcc-sc8280xp: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-3-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml | 20 |
1 files changed, 4 insertions, 16 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml index 3cb996b2c9d5..ffae037779a1 100644 --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml @@ -40,31 +40,19 @@ properties: - description: DSI 1 PLL byte clock - description: DSI 1 PLL DSI clock - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - power-domains: items: - description: MMCX power domain required: - compatible - - reg - clocks - - '#clock-cells' - - '#reset-cells' - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | |