diff options
| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2017-03-07 19:03:26 +0100 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2017-03-10 10:27:37 +0100 |
| commit | ccc499330dbcaa8f6065bd1b10a64ca09fa96c3e (patch) | |
| tree | 4b3a0f393fe352101a75d2609725bf391ffc8967 | |
| parent | arm64: dts: r8a7796: Add Cortex-A53 CPU cores (diff) | |
| download | wireguard-linux-ccc499330dbcaa8f6065bd1b10a64ca09fa96c3e.tar.xz wireguard-linux-ccc499330dbcaa8f6065bd1b10a64ca09fa96c3e.zip | |
arm64: dts: r8a7796: Add Cortex-A53 PMU node
Enable the performance monitor unit for the Cortex-A53 cores on the
R8A7796 SoC.
Extracted from a patch by Takeshi Kihara in the BSP.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7796.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index b32a180009dd..a90abf14dc4e 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -303,6 +303,18 @@ <&a57_1>; }; + pmu_a53 { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&a53_0>, + <&a53_1>, + <&a53_2>, + <&a53_3>; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a7796-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>; |