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| author |   Stephan Gerhold <stephan.gerhold@kernkonzept.com> | 2023-09-19 13:59:50 +0200 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2023-09-25 14:19:38 +0200 |
| commit | d15befc0cef42db7712714157d9483cab81149a1 (patch) | |
| tree | 087ecdc24abd528755905ccaa80db9386ffbc200 | |
| parent | spi: qup: Parse OPP table for DVFS support (diff) | |
| download | wireguard-linux-d15befc0cef42db7712714157d9483cab81149a1.tar.xz wireguard-linux-d15befc0cef42db7712714157d9483cab81149a1.zip | |
spi: dt-bindings: qup: Document interconnects
When the SPI QUP controller is used together with a DMA engine it needs
to vote for the interconnect path to the DRAM. Otherwise it may be
unable to access the memory quickly enough.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Link: https://lore.kernel.org/r/20230919-spi-qup-dvfs-v2-3-1bac2e9ab8db@kernkonzept.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml index 1e498a791406..88be13268962 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml @@ -44,6 +44,9 @@ properties: - const: tx - const: rx + interconnects: + maxItems: 1 + interrupts: maxItems: 1 @@ -67,6 +70,7 @@ unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,gcc-msm8996.h> + #include <dt-bindings/interconnect/qcom,msm8996.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/qcom-rpmpd.h> @@ -84,6 +88,7 @@ examples: dma-names = "tx", "rx"; power-domains = <&rpmpd MSM8996_VDDCX>; operating-points-v2 = <&spi_opp_table>; + interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>; #address-cells = <1>; #size-cells = <0>; }; |