diff options
| author |   Shiju Jose <shiju.jose@huawei.com> | 2025-07-17 11:18:16 +0100 |
|---|---|---|
| committer |   Dave Jiang <dave.jiang@intel.com> | 2025-07-18 08:19:56 -0700 |
| commit | d8145bb8af5c09d27c4dde4f4030d589771594d1 (patch) | |
| tree | 435fbf018449d2160faab239017e7c2e1fadd4c2 | |
| parent | cxl/events: Add extra validity checks for corrected memory error count in General Media Event Record (diff) | |
| download | wireguard-linux-d8145bb8af5c09d27c4dde4f4030d589771594d1.tar.xz wireguard-linux-d8145bb8af5c09d27c4dde4f4030d589771594d1.zip | |
cxl/events: Add extra validity checks for CVME count in DRAM Event Record
According to the CXL Specification Revision 3.2, Section 8.2.10.2.1.2,
Table 8-58 (DRAM Event Record), the CVME (Corrected Volatile Memory Error)
Count field is valid under the following conditions:
1. The Threshold Event bit is set in the Memory Event Descriptor field,
and
2. The CVME Count must be greater than 0 for events where the Advanced
Programmable Threshold Counter has expired.
Additionally, if the Advanced Programmable Corrected Memory Error Counter
Expire bit in the Memory Event Type field is set, then the Threshold Event
bit in the Memory Event Descriptor field shall also be set.
Add validity checks for the above conditions while reporting the event to
the userspace.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Link: https://patch.msgid.link/20250717101817.2104-4-shiju.jose@huawei.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
| -rw-r--r-- | drivers/cxl/core/mbox.c | 9 | ||||
| -rw-r--r-- | drivers/cxl/core/trace.h | 5 |
2 files changed, 13 insertions, 1 deletions
diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index ba4a29afd3aa..445889b128cd 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -941,6 +941,15 @@ void cxl_event_trace_record(const struct cxl_memdev *cxlmd, if (cxl_store_rec_dram((struct cxl_memdev *)cxlmd, evt)) dev_dbg(&cxlmd->dev, "CXL store rec_dram failed\n"); + if (evt->dram.media_hdr.descriptor & + CXL_GMER_EVT_DESC_THRESHOLD_EVENT) + WARN_ON_ONCE((evt->dram.media_hdr.type & + CXL_DER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE) && + !get_unaligned_le24(evt->dram.cvme_count)); + else + WARN_ON_ONCE(evt->dram.media_hdr.type & + CXL_DER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE); + trace_cxl_dram(cxlmd, type, cxlr, hpa, hpa_alias, &evt->dram); } diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h index c38f94ca0ca1..462c2e892ba2 100644 --- a/drivers/cxl/core/trace.h +++ b/drivers/cxl/core/trace.h @@ -661,7 +661,10 @@ TRACE_EVENT(cxl_dram, CXL_EVENT_GEN_MED_COMP_ID_SIZE); __entry->sub_channel = rec->sub_channel; __entry->cme_threshold_ev_flags = rec->cme_threshold_ev_flags; - __entry->cvme_count = get_unaligned_le24(rec->cvme_count); + if (rec->media_hdr.descriptor & CXL_GMER_EVT_DESC_THRESHOLD_EVENT) + __entry->cvme_count = get_unaligned_le24(rec->cvme_count); + else + __entry->cvme_count = 0; ), CXL_EVT_TP_printk("dpa=%llx dpa_flags='%s' descriptor='%s' type='%s' sub_type='%s' " \ |