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| author |   Chang S. Bae <chang.seok.bae@intel.com> | 2021-10-21 15:55:17 -0700 |
|---|---|---|
| committer |   Borislav Petkov <bp@suse.de> | 2021-10-26 10:18:09 +0200 |
| commit | dae1bd58389615d401a84aedc38fa075ef8f7de6 (patch) | |
| tree | 01e8f9c7df443052c9d7542cff4a3fefd83e3467 | |
| parent | x86/cpufeatures: Add eXtended Feature Disabling (XFD) feature bit (diff) | |
| download | wireguard-linux-dae1bd58389615d401a84aedc38fa075ef8f7de6.tar.xz wireguard-linux-dae1bd58389615d401a84aedc38fa075ef8f7de6.zip | |
x86/msr-index: Add MSRs for XFD
XFD introduces two MSRs:
- IA32_XFD to enable/disable a feature controlled by XFD
- IA32_XFD_ERR to expose to the #NM trap handler which feature
was tried to be used for the first time.
Both use the same xstate-component bitmap format, used by XCR0.
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20211021225527.10184-14-chang.seok.bae@intel.com
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index a7c413432b33..01e2650b9585 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -625,6 +625,8 @@ #define MSR_IA32_BNDCFGS_RSVD 0x00000ffc +#define MSR_IA32_XFD 0x000001c4 +#define MSR_IA32_XFD_ERR 0x000001c5 #define MSR_IA32_XSS 0x00000da0 #define MSR_IA32_APICBASE 0x0000001b |