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| author | 2026-07-04 14:55:15 +0200 | |
|---|---|---|
| committer | 2026-07-04 11:09:12 -0700 | |
| commit | db55777feca876dd2a548a232abeb3ddd8986a09 (patch) | |
| tree | 2a231be6716a62d6793cedf7655b3653558abd80 | |
| parent | x86/platform/quark: Fix kernel-doc warnings in imr.c (diff) | |
Documentation/arch/x86/amd-memory-encryption.rst: Fix typo
The MSR address has one 0 too many: 0xc00100010 → 0xc0010010.
Signed-off-by: Cédric Hannotier <hannotiercedric@gmail.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://patch.msgid.link/20260704125516.49944-1-hannotiercedric@gmail.com
| -rw-r--r-- | Documentation/arch/x86/amd-memory-encryption.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/arch/x86/amd-memory-encryption.rst b/Documentation/arch/x86/amd-memory-encryption.rst index bd840df708ea..92edb26a50d2 100644 --- a/Documentation/arch/x86/amd-memory-encryption.rst +++ b/Documentation/arch/x86/amd-memory-encryption.rst @@ -53,7 +53,7 @@ CPUID function 0x8000001f reports information related to SME:: system physical addresses, not guest physical addresses) -If support for SME is present, MSR 0xc00100010 (MSR_AMD64_SYSCFG) can be used to +If support for SME is present, MSR 0xc0010010 (MSR_AMD64_SYSCFG) can be used to determine if SME is enabled and/or to enable memory encryption:: 0xc0010010: |
