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author | 2025-02-19 12:48:00 +0100 | |
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committer | 2025-02-19 09:06:37 -0800 | |
commit | dbef257ab7fabc845fe359cbe74b08d3b590550e (patch) | |
tree | 73108624eeeccd8231d6cd1259144b1d3c8afe5e | |
parent | Linux 6.13 (diff) | |
download | wireguard-linux-dbef257ab7fabc845fe359cbe74b08d3b590550e.tar.xz wireguard-linux-dbef257ab7fabc845fe359cbe74b08d3b590550e.zip |
xtensa: ptrace: Remove zero-length alignment array
Use a compiler attribute to align the areg field to 16 bytes instead of
using a zero-length alignment array.
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Message-Id: <20250219114759.20110-2-thorsten.blum@linux.dev>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
-rw-r--r-- | arch/xtensa/include/asm/ptrace.h | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/xtensa/include/asm/ptrace.h b/arch/xtensa/include/asm/ptrace.h index 86c70117371b..4871e5a4d6fb 100644 --- a/arch/xtensa/include/asm/ptrace.h +++ b/arch/xtensa/include/asm/ptrace.h @@ -72,13 +72,10 @@ struct pt_regs { /* Additional configurable registers that are used by the compiler. */ xtregs_opt_t xtregs_opt; - /* Make sure the areg field is 16 bytes aligned. */ - int align[0] __attribute__ ((aligned(16))); - /* current register frame. * Note: The ESF for kernel exceptions ends after 16 registers! */ - unsigned long areg[XCHAL_NUM_AREGS]; + unsigned long areg[XCHAL_NUM_AREGS] __aligned(16); }; # define arch_has_single_step() (1) |