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| author |   Andy Yan <andy.yan@rock-chips.com> | 2025-04-22 15:04:45 +0800 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2025-05-05 10:18:01 +0200 |
| commit | dd6c77864aa69ba1079998c590b552e35649d51b (patch) | |
| tree | aa4e669fe84d5d30bd64c2a62f3bf59731880a5d | |
| parent | ARM: dts: rockchip: Add ref clk for hdmi (diff) | |
| download | wireguard-linux-dd6c77864aa69ba1079998c590b552e35649d51b.tar.xz wireguard-linux-dd6c77864aa69ba1079998c590b552e35649d51b.zip | |
Revert "ARM: dts: rockchip: drop grf reference from rk3036 hdmi"
This reverts commit 1580ccb6ed9dc76b8ff3e2d8912e8215c8b0fa6d.
The HSYNC/VSYNC polarity of rk3036 HDMI are controlled by GRF.
Without the polarity configuration in GRF, it can be observed from
the HDMI protocol analyzer that the H/V front/back timing output
by RK3036 HDMI are currently not in line with the specifications.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de> #rk3036-kylin
Link: https://lore.kernel.org/r/20250422070455.432666-7-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | arch/arm/boot/dts/rockchip/rk3036.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rockchip/rk3036.dtsi b/arch/arm/boot/dts/rockchip/rk3036.dtsi index 2c0c0a9e4a64..f4292b586bc2 100644 --- a/arch/arm/boot/dts/rockchip/rk3036.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3036.dtsi @@ -400,6 +400,7 @@ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_HDMI>, <&cru SCLK_LCDC>; clock-names = "pclk", "ref"; + rockchip,grf = <&grf>; pinctrl-names = "default"; pinctrl-0 = <&hdmi_ctl>; #sound-dai-cells = <0>; |