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authorMiquel Raynal <miquel.raynal@bootlin.com>2019-10-04 16:27:19 +0200
committerGregory CLEMENT <gregory.clement@bootlin.com>2019-10-09 09:35:33 +0200
commite231c6d47cca4b5df51bcf72dec1af767e63feaf (patch)
tree7d2553d513b6546974c842fcd8507211ab1302b0
parentarm64: dts: marvell: Enumerate the first AP806 syscon (diff)
downloadwireguard-linux-e231c6d47cca4b5df51bcf72dec1af767e63feaf.tar.xz
wireguard-linux-e231c6d47cca4b5df51bcf72dec1af767e63feaf.zip
arm64: dts: marvell: Add AP806-dual missing CPU clocks
CPU clocks have been added to AP806-quad but not to the -dual variant. Fixes: c00bc38354cf ("arm64: dts: marvell: Add cpu clock node on Armada 7K/8K") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
-rw-r--r--arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
index 9024a2d9db07..62ae016ee6aa 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
@@ -21,6 +21,7 @@
reg = <0x000>;
enable-method = "psci";
#cooling-cells = <2>;
+ clocks = <&cpu_clk 0>;
};
cpu1: cpu@1 {
device_type = "cpu";
@@ -28,6 +29,7 @@
reg = <0x001>;
enable-method = "psci";
#cooling-cells = <2>;
+ clocks = <&cpu_clk 0>;
};
};
};