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authorHaibo Chen <haibo.chen@nxp.com>2025-08-19 10:43:37 +0800
committerShawn Guo <shawnguo@kernel.org>2025-08-22 17:18:29 +0800
commite35318d8d2d2dccc50454e3fc0bd9caaf2a797cd (patch)
tree751f590528babc74053123d20365f1b8c66d60e9
parentarm64: dts: imx8mp: Fix missing microSD slot vqmmc on Data Modul i.MX8M Plus eDM SBC (diff)
downloadwireguard-linux-e35318d8d2d2dccc50454e3fc0bd9caaf2a797cd.tar.xz
wireguard-linux-e35318d8d2d2dccc50454e3fc0bd9caaf2a797cd.zip
arm64: dts: imx95-19x19-evk: correct the phy setting for flexcan1/2
1, the phy support up to 8Mbit/s databitrate for CAN FD. refer to product data sheet: https://www.nxp.com/docs/en/data-sheet/TJA1463.pdf 2, the standby pin of the phy is ACTIVE_LOW. 3, the phy of flexcan2 connect the standby/en pin to PCAL6408 on i2c4 bus. Fixes: 02b7adb791e1 ("arm64: dts: imx95-19x19-evk: add adc0 flexcan[1,2] i2c[2,3] uart5 spi3 and tpm3") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 2f949a0d48d2..9d034275c847 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -80,17 +80,17 @@
flexcan1_phy: can-phy0 {
compatible = "nxp,tjr1443";
#phy-cells = <0>;
- max-bitrate = <1000000>;
+ max-bitrate = <8000000>;
enable-gpios = <&i2c6_pcal6416 6 GPIO_ACTIVE_HIGH>;
- standby-gpios = <&i2c6_pcal6416 5 GPIO_ACTIVE_HIGH>;
+ standby-gpios = <&i2c6_pcal6416 5 GPIO_ACTIVE_LOW>;
};
flexcan2_phy: can-phy1 {
compatible = "nxp,tjr1443";
#phy-cells = <0>;
- max-bitrate = <1000000>;
- enable-gpios = <&i2c6_pcal6416 4 GPIO_ACTIVE_HIGH>;
- standby-gpios = <&i2c6_pcal6416 3 GPIO_ACTIVE_HIGH>;
+ max-bitrate = <8000000>;
+ enable-gpios = <&i2c4_gpio_expander_21 4 GPIO_ACTIVE_HIGH>;
+ standby-gpios = <&i2c4_gpio_expander_21 3 GPIO_ACTIVE_LOW>;
};
reg_vref_1v8: regulator-1p8v {