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| author |   J. Neuschäfer <j.ne@posteo.net> | 2025-06-11 21:01:01 +0200 |
|---|---|---|
| committer |   Madhavan Srinivasan <maddy@linux.ibm.com> | 2025-06-13 12:32:21 +0530 |
| commit | e75cb6010838f61b9d63e921d1763a8ab177e38e (patch) | |
| tree | 1dac1b62542464a4a7ef49a78fa2ead40a22edd9 | |
| parent | powerpc/microwatt: Fix model property in device tree (diff) | |
| download | wireguard-linux-e75cb6010838f61b9d63e921d1763a8ab177e38e.tar.xz wireguard-linux-e75cb6010838f61b9d63e921d1763a8ab177e38e.zip | |
powerpc: dts: mpc8315erdb: Add GPIO controller node
The MPC8315E SoC and variants have a GPIO controller at IMMR + 0xc00.
This node was previously missing from the device tree.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20250611-mpc-gpio-v1-1-02d1f75336e2@posteo.net
| -rw-r--r-- | arch/powerpc/boot/dts/mpc8315erdb.dts | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index e09b37d7489d..a89cb3139ca8 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts @@ -6,6 +6,7 @@ */ /dts-v1/; +#include <dt-bindings/interrupt-controller/irq.h> / { compatible = "fsl,mpc8315erdb"; @@ -358,6 +359,15 @@ interrupt-parent = <&ipic>; fsl,mpc8313-wakeup-timer = <>m1>; }; + + gpio: gpio-controller@c00 { + compatible = "fsl,mpc8314-gpio"; + reg = <0xc00 0x100>; + interrupts = <74 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&ipic>; + gpio-controller; + #gpio-cells = <2>; + }; }; pci0: pci@e0008500 { |