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| author |   Andrew Jones <drjones@redhat.com> | 2016-05-12 10:46:34 +0200 |
|---|---|---|
| committer |   Marc Zyngier <marc.zyngier@arm.com> | 2016-06-02 17:59:44 +0100 |
| commit | fab0cdc30d81694d2d5524b24e42c43414971719 (patch) | |
| tree | 258115c05459202e238845f992387114cd0d7140 | |
| parent | irqchip/gic-v3: Fix ICC_SGI1R_EL1.INTID decoding mask (diff) | |
| download | wireguard-linux-fab0cdc30d81694d2d5524b24e42c43414971719.tar.xz wireguard-linux-fab0cdc30d81694d2d5524b24e42c43414971719.zip | |
irqchip/gic-v3: Fix copy+paste mistakes in defines
ICC_SGI1R_AFFINITY_{2,3}_MASK are unused, which is good
because they were defined with the wrong shifts.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| -rw-r--r-- | include/linux/irqchip/arm-gic-v3.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index 85a8c2acdef5..dc493e0f0ff7 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -307,10 +307,10 @@ #define ICC_SGI1R_SGI_ID_SHIFT 24 #define ICC_SGI1R_SGI_ID_MASK (0xfULL << ICC_SGI1R_SGI_ID_SHIFT) #define ICC_SGI1R_AFFINITY_2_SHIFT 32 -#define ICC_SGI1R_AFFINITY_2_MASK (0xffULL << ICC_SGI1R_AFFINITY_1_SHIFT) +#define ICC_SGI1R_AFFINITY_2_MASK (0xffULL << ICC_SGI1R_AFFINITY_2_SHIFT) #define ICC_SGI1R_IRQ_ROUTING_MODE_BIT 40 #define ICC_SGI1R_AFFINITY_3_SHIFT 48 -#define ICC_SGI1R_AFFINITY_3_MASK (0xffULL << ICC_SGI1R_AFFINITY_1_SHIFT) +#define ICC_SGI1R_AFFINITY_3_MASK (0xffULL << ICC_SGI1R_AFFINITY_3_SHIFT) #include <asm/arch_gicv3.h> |