diff options
| author |   Sasha Neftin <sasha.neftin@intel.com> | 2022-07-05 07:19:10 +0300 |
|---|---|---|
| committer |   Tony Nguyen <anthony.l.nguyen@intel.com> | 2022-07-18 09:32:39 -0700 |
| commit | fb24f341c7b977ca4d5993034ea9c5de9763446a (patch) | |
| tree | 37d1d0bef435ee1bd8912da3da3e113c61064f53 | |
| parent | igc: Lift TAPRIO schedule restriction (diff) | |
| download | wireguard-linux-fb24f341c7b977ca4d5993034ea9c5de9763446a.tar.xz wireguard-linux-fb24f341c7b977ca4d5993034ea9c5de9763446a.zip | |
igc: Remove MSI-X PBA Clear register
MSI-X PBA Clear register is not used. This patch comes to tidy up the
driver code.
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Naama Meir <naamax.meir@linux.intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
| -rw-r--r-- | drivers/net/ethernet/intel/igc/igc_regs.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethernet/intel/igc/igc_regs.h index e197a33d93a0..d06018150764 100644 --- a/drivers/net/ethernet/intel/igc/igc_regs.h +++ b/drivers/net/ethernet/intel/igc/igc_regs.h @@ -59,9 +59,6 @@ #define IGC_IVAR_MISC 0x01740 /* IVAR for "other" causes - RW */ #define IGC_GPIE 0x01514 /* General Purpose Intr Enable - RW */ -/* MSI-X Table Register Descriptions */ -#define IGC_PBACL 0x05B68 /* MSIx PBA Clear - R/W 1 to clear */ - /* RSS registers */ #define IGC_MRQC 0x05818 /* Multiple Receive Control - RW */ |