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| author |   Zenghui Yu <yuzenghui@huawei.com> | 2019-12-30 21:14:28 +0800 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2019-12-30 08:21:29 -0600 |
| commit | 7730c3be06e255082077594f60aae77f9914c5ad (patch) | |
| tree | 8fa5c62756afcaf1446f9fe57c0e4d2f13aa8dd0 /Documentation/PCI | |
| parent | PCI: Increase D3 delay for AMD Ryzen5/7 XHCI controllers (diff) | |
| download | wireguard-linux-7730c3be06e255082077594f60aae77f9914c5ad.tar.xz wireguard-linux-7730c3be06e255082077594f60aae77f9914c5ad.zip | |
Documentation: PCI: Fix pci_alloc_irq_vectors() function name typo
Documentation/PCI/msi-howto.rst referred to pci_irq_alloc_vectors() when it
should refer to pci_alloc_irq_vectors(). Fix the typo.
Link: https://lore.kernel.org/r/20191230131428.1200-1-yuzenghui@huawei.com
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Diffstat (limited to 'Documentation/PCI')
| -rw-r--r-- | Documentation/PCI/msi-howto.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/PCI/msi-howto.rst b/Documentation/PCI/msi-howto.rst index 994cbb660ade..aa2046af69f7 100644 --- a/Documentation/PCI/msi-howto.rst +++ b/Documentation/PCI/msi-howto.rst @@ -283,5 +283,5 @@ or disabled (0). If 0 is found in any of the msi_bus files belonging to bridges between the PCI root and the device, MSIs are disabled. It is also worth checking the device driver to see whether it supports MSIs. -For example, it may contain calls to pci_irq_alloc_vectors() with the +For example, it may contain calls to pci_alloc_irq_vectors() with the PCI_IRQ_MSI or PCI_IRQ_MSIX flags. |