diff options
| author |   Marc Zyngier <maz@kernel.org> | 2021-10-17 13:42:25 +0100 |
|---|---|---|
| committer |   Will Deacon <will@kernel.org> | 2021-10-19 10:56:20 +0100 |
| commit | fee29f008aa3f2aff01117f28b57b1145d92cb9b (patch) | |
| tree | c8e8ea36d8cb73ced0b6557d7e862cf9571408bb /Documentation/arm64/elf_hwcaps.rst | |
| parent | arm64: Add handling of CNTVCTSS traps (diff) | |
| download | wireguard-linux-fee29f008aa3f2aff01117f28b57b1145d92cb9b.tar.xz wireguard-linux-fee29f008aa3f2aff01117f28b57b1145d92cb9b.zip | |
arm64: Add HWCAP for self-synchronising virtual counter
Since userspace can make use of the CNTVSS_EL0 instruction, expose
it via a HWCAP.
Suggested-by: Will Deacon <will@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211017124225.3018098-18-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation/arm64/elf_hwcaps.rst')
| -rw-r--r-- | Documentation/arm64/elf_hwcaps.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst index ec1a5a63c1d0..af106af8e1c0 100644 --- a/Documentation/arm64/elf_hwcaps.rst +++ b/Documentation/arm64/elf_hwcaps.rst @@ -247,6 +247,10 @@ HWCAP2_MTE Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described by Documentation/arm64/memory-tagging-extension.rst. +HWCAP2_ECV + + Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. + 4. Unused AT_HWCAP bits ----------------------- |