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| author |   Will Deacon <will@kernel.org> | 2020-01-22 11:38:53 +0000 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2020-01-22 11:38:53 +0000 |
| commit | bc206065944e2d6bd917e719dc897ffff8dbbca8 (patch) | |
| tree | c085dc23f5b52e0621b164f0d5fd205d8bd50b47 /Documentation/arm64 | |
| parent | Merge branch 'for-next/errata' into for-next/core (diff) | |
| parent | arm64: Use v8.5-RNG entropy for KASLR seed (diff) | |
| download | wireguard-linux-bc206065944e2d6bd917e719dc897ffff8dbbca8.tar.xz wireguard-linux-bc206065944e2d6bd917e719dc897ffff8dbbca8.zip | |
Merge branch 'for-next/rng' into for-next/core
* for-next/rng: (2 commits)
arm64: Use v8.5-RNG entropy for KASLR seed
...
Diffstat (limited to 'Documentation/arm64')
| -rw-r--r-- | Documentation/arm64/cpu-feature-registers.rst | 2 | ||||
| -rw-r--r-- | Documentation/arm64/elf_hwcaps.rst | 4 |
2 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst index 27877d25dd9b..41937a8091aa 100644 --- a/Documentation/arm64/cpu-feature-registers.rst +++ b/Documentation/arm64/cpu-feature-registers.rst @@ -117,6 +117,8 @@ infrastructure: +------------------------------+---------+---------+ | Name | bits | visible | +------------------------------+---------+---------+ + | RNDR | [63-60] | y | + +------------------------------+---------+---------+ | TS | [55-52] | y | +------------------------------+---------+---------+ | FHM | [51-48] | y | diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst index 4fafc57d8e73..7dfb97dfe416 100644 --- a/Documentation/arm64/elf_hwcaps.rst +++ b/Documentation/arm64/elf_hwcaps.rst @@ -232,6 +232,10 @@ HWCAP2_DGH Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001. +HWCAP2_RNG + + Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001. + 4. Unused AT_HWCAP bits ----------------------- |