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| author |   Randy Dunlap <rdunlap@infradead.org> | 2020-07-07 11:04:07 -0700 |
|---|---|---|
| committer |   Jonathan Corbet <corbet@lwn.net> | 2020-07-13 09:44:07 -0600 |
| commit | 498ad0adb6a6a8830530bd148cfabafbd82afa2a (patch) | |
| tree | c4296d1ba30124d31fdc24a5682e07c484e13ca7 /Documentation/mips | |
| parent | Documentation: maintainer-entry-profile: eliminate duplicated word (diff) | |
| download | wireguard-linux-498ad0adb6a6a8830530bd148cfabafbd82afa2a.tar.xz wireguard-linux-498ad0adb6a6a8830530bd148cfabafbd82afa2a.zip | |
Documentation: mips/ingenic-tcu: eliminate duplicated word
Drop the doubled word "to".
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: linux-doc@vger.kernel.org
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Link: https://lore.kernel.org/r/20200707180414.10467-14-rdunlap@infradead.org
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'Documentation/mips')
| -rw-r--r-- | Documentation/mips/ingenic-tcu.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/mips/ingenic-tcu.rst b/Documentation/mips/ingenic-tcu.rst index c5a646b14450..52d1ef19679b 100644 --- a/Documentation/mips/ingenic-tcu.rst +++ b/Documentation/mips/ingenic-tcu.rst @@ -5,7 +5,7 @@ Ingenic JZ47xx SoCs Timer/Counter Unit hardware =============================================== The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function -hardware block. It features up to to eight channels, that can be used as +hardware block. It features up to eight channels, that can be used as counters, timers, or PWM. - JZ4725B, JZ4750, JZ4755 only have six TCU channels. The other SoCs all |