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| author |   Palmer Dabbelt <palmer@rivosinc.com> | 2022-07-28 14:07:15 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-10-12 08:58:10 -0700 |
| commit | 06267eb2decaa6baac81bbd882265a8e7782dba4 (patch) | |
| tree | 9759083742d36af3785229f7d98559e4fc9a363f /Documentation/riscv | |
| parent | riscv: always honor the CONFIG_CMDLINE_FORCE when parsing dtb (diff) | |
| download | wireguard-linux-06267eb2decaa6baac81bbd882265a8e7782dba4.tar.xz wireguard-linux-06267eb2decaa6baac81bbd882265a8e7782dba4.zip | |
doc: RISC-V: Document that misaligned accesses are supported
The RISC-V ISA manual used to mandate that misaligned accesses were
supported in user mode, but that requirement was removed in 2018 via
riscv-isa-manual commit 61cadb9 ("Provide new description of misaligned
load/store behavior compatible with privileged architecture."). Since
the Linux uABI was already frozen at that point it's just been demoted
to part of the uABI, but that was never written down.
Link: https://lore.kernel.org/r/20220728210715.17214-1-palmer@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'Documentation/riscv')
| -rw-r--r-- | Documentation/riscv/index.rst | 1 | ||||
| -rw-r--r-- | Documentation/riscv/uabi.rst | 6 |
2 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/riscv/index.rst b/Documentation/riscv/index.rst index e23b876ad6eb..2e5b18fbb145 100644 --- a/Documentation/riscv/index.rst +++ b/Documentation/riscv/index.rst @@ -8,6 +8,7 @@ RISC-V architecture boot-image-header vm-layout patch-acceptance + uabi features diff --git a/Documentation/riscv/uabi.rst b/Documentation/riscv/uabi.rst new file mode 100644 index 000000000000..21a82cfb6c4d --- /dev/null +++ b/Documentation/riscv/uabi.rst @@ -0,0 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0 + +RISC-V Linux User ABI +===================== + +Misaligned accesses are supported in userspace, but they may perform poorly. |