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authorTudor Ambarus <tudor.ambarus@microchip.com>2020-05-14 05:03:10 +0000
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2020-05-15 16:50:33 +0200
commit56cd4b9e8c67fa60244aea013cc3846f9d8c498b (patch)
treec474e7e29cf4a33a5da25e59e8641643fb98bd61 /arch/arm/boot/dts/at91-sama5d2_xplained.dts
parentARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi (diff)
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ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. There is a single functional change in this patch. With the move of the flx0 uart5 definition in the SoC dtsi, the uart5 from at91-sama5d27_wlsom1_ek.dts inherits the following optional property: atmel,fifo-size = <32>; This particular change was tested by Codrin. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-7-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/at91-sama5d2_xplained.dts')
-rw-r--r--arch/arm/boot/dts/at91-sama5d2_xplained.dts7
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index a5046f8257ad..da4442715ea5 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -327,14 +327,9 @@
status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
uart5: serial@200 {
- compatible = "atmel,at91sam9260-usart";
- reg = <0x200 0x200>;
- interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
- clock-names = "usart";
+ dmas = <0>, <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx0_default>;
- atmel,fifo-size = <32>;
status = "okay";
};
};