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authorStefan Agner <stefan@agner.ch>2018-09-06 16:46:58 -0700
committerShawn Guo <shawnguo@kernel.org>2018-09-10 09:08:57 +0800
commit78f10734f95873c22255f536e894c704bb5e8fa2 (patch)
tree91ca176fcb327d303ff7d0932fad63cb747ee59e /arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
parentARM: dts: imx6ul: Enable the PMU node (diff)
downloadwireguard-linux-78f10734f95873c22255f536e894c704bb5e8fa2.tar.xz
wireguard-linux-78f10734f95873c22255f536e894c704bb5e8fa2.zip
ARM: dts: imx6q-apalis: mux RESET_MOCI# signal
The pinctrl properties on the IOMUXC node get overwritten by the carrier board level device tree, hence the pinctrl_reset_moci pinctrl does not get applied. Associate the pinctrl_reset_moci pinctrl with the PCIe node where we also make use of the pin as a reset GPIO. Since the pin is muxed as a GPIO by default not muxing it explicitly worked fine in practise. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts')
-rw-r--r--arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
index 4e1c8feaef82..b94bb687be6b 100644
--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
@@ -196,6 +196,8 @@
};
&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reset_moci>;
/* active-high meaning opposite of regular PERST# active-low polarity */
reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
reset-gpio-active-high;