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| author |   Tomer Maimon <tmaimon77@gmail.com> | 2020-09-29 16:18:03 +0300 |
|---|---|---|
| committer |   Joel Stanley <joel@jms.id.au> | 2020-11-17 12:40:49 +1030 |
| commit | 3e50523fe6f4b0ade2e8e0a1428e23b7503fb85c (patch) | |
| tree | 4b3c614ec8839c960868dca7eaea591ca94ffffd /arch/arm/boot/dts/nuvoton-npcm750.dtsi | |
| parent | Linux 5.10-rc1 (diff) | |
| download | wireguard-linux-3e50523fe6f4b0ade2e8e0a1428e23b7503fb85c.tar.xz wireguard-linux-3e50523fe6f4b0ade2e8e0a1428e23b7503fb85c.zip | |
ARM: dts: nuvoton: Modify clock parameters
Modify NPCM7xx device tree clock parameter to clock constants that
define at include/dt-bindings/clock/nuvoton,npcm7xx-clock.h file.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200929131807.15378-2-tmaimon77@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/nuvoton-npcm750.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/nuvoton-npcm750.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton-npcm750.dtsi index 6ac340533587..a37bb2294b8f 100644 --- a/arch/arm/boot/dts/nuvoton-npcm750.dtsi +++ b/arch/arm/boot/dts/nuvoton-npcm750.dtsi @@ -17,7 +17,7 @@ cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; - clocks = <&clk 0>; + clocks = <&clk NPCM7XX_CLK_CPU>; clock-names = "clk_cpu"; reg = <0>; next-level-cache = <&l2>; @@ -26,7 +26,7 @@ cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; - clocks = <&clk 0>; + clocks = <&clk NPCM7XX_CLK_CPU>; clock-names = "clk_cpu"; reg = <1>; next-level-cache = <&l2>; @@ -38,7 +38,7 @@ reg = <0x3fe600 0x20>; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&clk 5>; + clocks = <&clk NPCM7XX_CLK_AHB>; }; }; }; |