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| author |   Chris Brandt <chris.brandt@renesas.com> | 2020-02-10 07:31:53 -0500 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2020-02-10 13:53:20 +0100 |
| commit | b214f94e0f5f00c11308d8b9ef4d396252edd91b (patch) | |
| tree | fdbfb13bdf6c87bf89ebe2c8ce8ee1643cd7acaa /arch/arm/boot/dts/r7s72100-gr-peach.dts | |
| parent | ARM: dts: renesas: Group tuples in operating-points properties (diff) | |
| download | wireguard-linux-b214f94e0f5f00c11308d8b9ef4d396252edd91b.tar.xz wireguard-linux-b214f94e0f5f00c11308d8b9ef4d396252edd91b.zip | |
ARM: dts: r7s72100: Add SPIBSC clocks
Add clocks for SPIBSC blocks.
Also modify the flash node for the GR-PEACH board at the same time
because now that the SPIBSC clock is identified, if it is not used
by any driver, it will be turned off at the end of kernel boot.
That would not work out so well for an XIP system such as GR-PEACH.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Link: https://lore.kernel.org/r/20200210123153.8257-1-chris.brandt@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm/boot/dts/r7s72100-gr-peach.dts')
| -rw-r--r-- | arch/arm/boot/dts/r7s72100-gr-peach.dts | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts index fe1a4aa4d7cb..2562cc9b5356 100644 --- a/arch/arm/boot/dts/r7s72100-gr-peach.dts +++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts @@ -41,6 +41,9 @@ bank-width = <4>; device-width = <1>; + clocks = <&mstp9_clks R7S72100_CLK_SPIBSC0>; + power-domains = <&cpg_clocks>; + #address-cells = <1>; #size-cells = <1>; |