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author | Miquel Raynal <miquel.raynal@bootlin.com> | 2021-12-17 15:20:33 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-01-24 10:09:13 +0100 |
commit | f2ad62a2717b17197d0a27a5bb26e30641604e4f (patch) | |
tree | ce270ce0b66b0d9d75338a441b0bae54f249e516 /arch/arm/boot/dts/r9a06g032.dtsi | |
parent | arm64: dts: renesas: Add GMSL cameras .dtsi (diff) | |
download | wireguard-linux-f2ad62a2717b17197d0a27a5bb26e30641604e4f.tar.xz wireguard-linux-f2ad62a2717b17197d0a27a5bb26e30641604e4f.zip |
ARM: dts: r9a06g032: Describe the NAND controller
Describe the NAND controller embedded in r9a06g032 SoCs.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211217142033.353599-5-miquel.raynal@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm/boot/dts/r9a06g032.dtsi')
-rw-r--r-- | arch/arm/boot/dts/r9a06g032.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index c47896e4ab58..db657224688a 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -173,6 +173,17 @@ status = "okay"; }; + nand_controller: nand-controller@40102000 { + compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc"; + reg = <0x40102000 0x2000>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>; + clock-names = "hclk", "eclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; |