aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/arch/arm/boot/dts/sama7g5.dtsi
diff options
context:
space:
mode:
authorClaudiu Beznea <claudiu.beznea@microchip.com>2022-02-07 13:15:23 +0200
committerNicolas Ferre <nicolas.ferre@microchip.com>2022-02-24 19:30:41 +0100
commitfb45a72e2c46b47140254a7c1c7d9f2294d2da68 (patch)
tree03d9a9390cb00756ffdb64e74a9d7253b8e6bf17 /arch/arm/boot/dts/sama7g5.dtsi
parentARM: dts: at91: sama5d2: Fix PMERRLOC resource size (diff)
downloadwireguard-linux-fb45a72e2c46b47140254a7c1c7d9f2294d2da68.tar.xz
wireguard-linux-fb45a72e2c46b47140254a7c1c7d9f2294d2da68.zip
ARM: dts: at91: remove status = "okay" from soc specific dtsi
Remove status = "okay" from SoC specific dtsi as this is the default state. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220207111523.575474-1-claudiu.beznea@microchip.com
Diffstat (limited to 'arch/arm/boot/dts/sama7g5.dtsi')
-rw-r--r--arch/arm/boot/dts/sama7g5.dtsi3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index eddcfbf4d223..f6892ed07301 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -83,7 +83,6 @@
#size-cells = <1>;
ranges = <0 0xe0000000 0x4000>;
no-memory-wc;
- status = "okay";
};
secumod: secumod@e0004000 {
@@ -618,13 +617,11 @@
uddrc: uddrc@e3800000 {
compatible = "microchip,sama7g5-uddrc";
reg = <0xe3800000 0x4000>;
- status = "okay";
};
ddr3phy: ddr3phy@e3804000 {
compatible = "microchip,sama7g5-ddr3phy";
reg = <0xe3804000 0x1000>;
- status = "okay";
};
gic: interrupt-controller@e8c11000 {