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| author |   Grzegorz Szymaszek <gszymaszek@short.pl> | 2021-04-10 21:35:21 +0200 |
|---|---|---|
| committer |   Alexandre Torgue <alexandre.torgue@foss.st.com> | 2021-06-01 11:20:19 +0200 |
| commit | 0171b07373cc8c2815ca5fa79a7308fdefa54ca4 (patch) | |
| tree | c428776644a460cff44892e3d5cc57901f21b532 /arch/arm/boot/dts/stm32mp157c-odyssey.dts | |
| parent | ARM: dts: stm32: Configure qspi's mdma transfer to block for stm32mp151 (diff) | |
| download | wireguard-linux-0171b07373cc8c2815ca5fa79a7308fdefa54ca4.tar.xz wireguard-linux-0171b07373cc8c2815ca5fa79a7308fdefa54ca4.zip | |
ARM: dts: stm32: fix stm32mp157c-odyssey card detect pin
The microSD card detect pin is physically connected to the MPU pin PI3.
The Device Tree configuration of the card detect pin was wrong—it was
set to pin PB7 instead. If such configuration was used, the kernel would
hang on “Waiting for root device” when booting from a microSD card.
Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp157c-odyssey.dts')
| -rw-r--r-- | arch/arm/boot/dts/stm32mp157c-odyssey.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/stm32mp157c-odyssey.dts b/arch/arm/boot/dts/stm32mp157c-odyssey.dts index a7ffec8f1516..be1dd5e9e744 100644 --- a/arch/arm/boot/dts/stm32mp157c-odyssey.dts +++ b/arch/arm/boot/dts/stm32mp157c-odyssey.dts @@ -64,7 +64,7 @@ pinctrl-0 = <&sdmmc1_b4_pins_a>; pinctrl-1 = <&sdmmc1_b4_od_pins_a>; pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; - cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + cd-gpios = <&gpioi 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; disable-wp; st,neg-edge; bus-width = <4>; |