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| author |   Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-09-02 12:08:32 +0200 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2018-09-26 16:52:27 +0200 |
| commit | 59b6f20bccbd47917ca63ae2b5a5d3f849aa46c0 (patch) | |
| tree | bf6e1a1325ea2d2c6ef5ec24d55c55a292189c77 /arch/arm/boot/dts/tegra20-colibri-iris.dts | |
| parent | ARM: tegra: colibri_t20: iris: integrate i2c real time clock support (diff) | |
| download | wireguard-linux-59b6f20bccbd47917ca63ae2b5a5d3f849aa46c0.tar.xz wireguard-linux-59b6f20bccbd47917ca63ae2b5a5d3f849aa46c0.zip | |
ARM: tegra: colibri_t20: iris: add missing aliases
Add rtc0 being the ultra low-power I2C one as found on the carrier board
and the 3rd UART being NVIDIA's UARTB.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-colibri-iris.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-colibri-iris.dts | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts index b6d05da8c93c..cbf1f4d76813 100644 --- a/arch/arm/boot/dts/tegra20-colibri-iris.dts +++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts @@ -8,10 +8,12 @@ compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20"; aliases { - rtc0 = "/i2c@7000d000/tps6586x@34"; - rtc1 = "/rtc@7000e000"; + rtc0 = "/i2c@7000c000/rtc@68"; + rtc1 = "/i2c@7000d000/tps6586x@34"; + rtc2 = "/rtc@7000e000"; serial0 = &uarta; serial1 = &uartd; + serial2 = &uartb; }; chosen { |