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| author |   Jaehoon Chung <jh80.chung@samsung.com> | 2020-10-29 14:40:17 +0100 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzk@kernel.org> | 2020-11-06 08:03:20 +0100 |
| commit | 98c03b6eef3f9c7d8153f96870968615ab489a6b (patch) | |
| tree | 57a6e1c46db81b642f7fb1f3a5fa2dc73f425eff /arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | |
| parent | arm64: dts: exynos: remove redundant status=okay in Exynos5433 TM2 (diff) | |
| download | wireguard-linux-98c03b6eef3f9c7d8153f96870968615ab489a6b.tar.xz wireguard-linux-98c03b6eef3f9c7d8153f96870968615ab489a6b.zip | |
arm64: dts: exynos: add the WiFi/PCIe support to TM2(e) boards
Add the nodes relevant to PCIe PHY and PCIe support. PCIe is used for the
WiFi interface (Broadcom Limited BCM4358 802.11ac Wireless LAN SoC).
[mszyprow: rewrote commit message, reworked board/generic dts/dtsi split]
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20201029134017.27400-7-m.szyprowski@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi index 97a2f0c7c0cf..5ec447f0cf5d 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi @@ -968,6 +968,25 @@ bus-width = <4>; }; +&pcie { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_bus &pcie_wlanen>; + vdd10-supply = <&ldo6_reg>; + vdd18-supply = <&ldo7_reg>; + assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>, + <&cmu_top CLK_MOUT_SCLK_PCIE_100>; + assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>, + <&cmu_top CLK_MOUT_BUS_PLL_USER>; + assigned-clock-rates = <0>, <100000000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; +}; + +&pcie_phy { + status = "okay"; +}; + &ppmu_d0_general { status = "okay"; events { @@ -1084,8 +1103,11 @@ pinctrl-names = "default"; pinctrl-0 = <&initial_ese>; + pcie_wlanen: pcie-wlanen { + PIN(INPUT, gpj2-0, UP, FAST_SR4); + }; + initial_ese: initial-state { - PIN(INPUT, gpj2-0, DOWN, FAST_SR1); PIN(INPUT, gpj2-1, DOWN, FAST_SR1); PIN(INPUT, gpj2-2, DOWN, FAST_SR1); }; |