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| author |   Miquel Raynal <miquel.raynal@bootlin.com> | 2019-07-31 14:21:25 +0200 |
|---|---|---|
| committer |   Gregory CLEMENT <gregory.clement@bootlin.com> | 2019-08-27 16:20:16 +0200 |
| commit | ce55522c035e98803832eff8938f621f25b0f4f1 (patch) | |
| tree | 63caacc8573c0ef7c4e97f1fc3ed3a6e2aeb0d9c /arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | |
| parent | arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes (diff) | |
| download | wireguard-linux-ce55522c035e98803832eff8938f621f25b0f4f1.tar.xz wireguard-linux-ce55522c035e98803832eff8938f621f25b0f4f1.zip | |
arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes
Fill-in the missing PCIe phys/phy-names DT properties of Armada 7k/8k
based boards.
The MacchiatoBin is a bit particular as the Armada8k-PCI IP supports
x4 link widths and in this case the PHY for each lane must be
referenced.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts')
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts index 281209aa7f2c..bcb0421c7ac0 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts @@ -243,6 +243,8 @@ pinctrl-names = "default"; pinctrl-0 = <&cp0_pci0_reset_pins &cp0_wlan_disable_pins>; reset-gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>; + phys = <&cp0_comphy0 0>; + phy-names = "cp0-pcie0-x1-phy"; status = "okay"; }; |