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authorMiquel Raynal <miquel.raynal@bootlin.com>2019-07-31 14:21:23 +0200
committerGregory CLEMENT <gregory.clement@bootlin.com>2019-08-27 16:17:28 +0200
commitd04abe999e20a57c96b305d329e480ffe057c9ec (patch)
tree35aa9000d6947ef71bd98f524ff2f6c1266d8cb3 /arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
parentarm64: dts: marvell: Add CP110 COMPHY clocks (diff)
downloadwireguard-linux-d04abe999e20a57c96b305d329e480ffe057c9ec.tar.xz
wireguard-linux-d04abe999e20a57c96b305d329e480ffe057c9ec.zip
arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes
Fill-in the missing SATA phys/phy-names DT properties of Armada 7k/8k based boards. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
index f275d9420d5b..1527c82177ab 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -348,6 +348,11 @@
&cp1_sata0 {
pinctrl-0 = <&cp0_pci1_reset_pins>;
status = "okay";
+
+ sata-port@1 {
+ phys = <&cp1_comphy0 1>;
+ phy-names = "cp1-sata0-1-phy";
+ };
};
&cp1_mdio {