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authorBartosz Golaszewski <bartosz.golaszewski@linaro.org>2023-02-14 10:27:13 +0100
committerBjorn Andersson <andersson@kernel.org>2023-03-14 19:30:46 -0700
commit603f96d4c9d0cb42f934fb0b99440bb9e8ba4385 (patch)
tree793098331c53c6b5c6df87da44a10556b4966218 /arch/arm64/boot/dts/qcom/sa8775p-ride.dts
parentarm64: dts: qcom: pm8998: Add a specific compatible for coincell chg (diff)
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arm64: dts: qcom: add initial support for qcom sa8775p-ride
This adds basic support for the Qualcomm sa8775p platform and the reference board: sa8775p-ride. The dt files describe the basics of the SoC and enable booting to shell. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230214092713.211054-3-brgl@bgdev.pl
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sa8775p-ride.dts')
-rw-r--r--arch/arm64/boot/dts/qcom/sa8775p-ride.dts47
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
new file mode 100644
index 000000000000..3adf7349f4e5
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+/dts-v1/;
+
+#include "sa8775p.dtsi"
+
+/ {
+ model = "Qualcomm SA8775P Ride";
+ compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
+
+ aliases {
+ serial0 = &uart10;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&qupv3_id_1 {
+ status = "okay";
+};
+
+&sleep_clk {
+ clock-frequency = <32764>;
+};
+
+&tlmm {
+ qup_uart10_default: qup-uart10-state {
+ pins = "gpio46", "gpio47";
+ function = "qup1_se3";
+ };
+};
+
+&uart10 {
+ compatible = "qcom,geni-debug-uart";
+ pinctrl-0 = <&qup_uart10_default>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&xo_board_clk {
+ clock-frequency = <38400000>;
+};