aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
diff options
context:
space:
mode:
authorGeert Uytterhoeven <geert+renesas@glider.be>2021-03-16 16:47:05 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-03-22 09:25:48 +0100
commit431c8ae4519dba5ffec5b9a4c6bca90f3e591bb8 (patch)
treeda80061c9bf616adb208ed6bb354911571cf5406 /arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
parentarm64: dts: renesas: falcon: Move watchdog config to CPU board DTS (diff)
downloadwireguard-linux-431c8ae4519dba5ffec5b9a4c6bca90f3e591bb8.tar.xz
wireguard-linux-431c8ae4519dba5ffec5b9a4c6bca90f3e591bb8.zip
arm64: dts: renesas: falcon: Move AVB0 to main DTS
The Ethernet PHY for the first AVB instance is located on the Falcon BreakOut board. Hence move its description from the DTS file that describes the CPU board to the main Falcon DTS file. Fixes: e8ac55a5e70a9522 ("arm64: dts: renesas: falcon: Add Ethernet-AVB0 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20210316154705.2433528-4-geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi34
1 files changed, 0 insertions, 34 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
index 97d40e3e05ff..e9133f9348df 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
@@ -60,22 +60,6 @@
};
};
-&avb0 {
- pinctrl-0 = <&avb0_pins>;
- pinctrl-names = "default";
- phy-handle = <&phy0>;
- tx-internal-delay-ps = <2000>;
- status = "okay";
-
- phy0: ethernet-phy@0 {
- rxc-skew-ps = <1500>;
- reg = <0>;
- interrupt-parent = <&gpio4>;
- interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
- reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
- };
-};
-
&extal_clk {
clock-frequency = <16666666>;
};
@@ -136,24 +120,6 @@
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
- avb0_pins: avb0 {
- mux {
- groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
- function = "avb0";
- };
-
- pins_mdio {
- groups = "avb0_mdio";
- drive-strength = <21>;
- };
-
- pins_mii {
- groups = "avb0_rgmii";
- drive-strength = <21>;
- };
-
- };
-
i2c0_pins: i2c0 {
groups = "i2c0";
function = "i2c0";