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authorSharat Masetty <smasetty@codeaurora.org>2020-07-17 18:59:38 +0530
committerBjorn Andersson <bjorn.andersson@linaro.org>2020-07-27 23:27:03 -0700
commitdd7dc299f303f215bb7ab9b2105ee50f591e5013 (patch)
tree49df6b6f22c9d3c591b66dbe19534e986431f6b0 /arch/arm64/boot
parentarm64: dts: qcom: SDM845: Enable GPU DDR bw scaling (diff)
downloadwireguard-linux-dd7dc299f303f215bb7ab9b2105ee50f591e5013.tar.xz
wireguard-linux-dd7dc299f303f215bb7ab9b2105ee50f591e5013.zip
arm64: dts: qcom: sc7180: Add interconnects property for GPU
This patch adds the interconnects property to the GPU node. This enables the GPU->DDR path bandwidth voting. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-6-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/qcom/sc7180.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 5688cbb96bdd..3255d3768cc0 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -1886,6 +1886,9 @@
operating-points-v2 = <&gpu_opp_table>;
qcom,gmu = <&gmu>;
+ interconnects = <&gem_noc MASTER_GFX3D &mc_virt SLAVE_EBI1>;
+ interconnect-names = "gfx-mem";
+
gpu_opp_table: opp-table {
compatible = "operating-points-v2";