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| author |   Jesper Nilsson <jespern@axis.com> | 2014-01-15 14:42:37 +0100 |
|---|---|---|
| committer | Jesper Nilsson <jespern@axis.com> | 2014-01-15 14:44:02 +0100 |
| commit | e269a869417cd4053b37da1b19186902d3cbf63b (patch) | |
| tree | 6d97e80f40859b62cfa8a1a634a1c3ad944681b1 /arch/cris/arch-v10/kernel/head.S | |
| parent | Cleanup whitespace, remove old author tag (diff) | |
| download | wireguard-linux-e269a869417cd4053b37da1b19186902d3cbf63b.tar.xz wireguard-linux-e269a869417cd4053b37da1b19186902d3cbf63b.zip | |
Drop code for CRISv10 CPU simulator
That simulator is dead and redundant.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
Diffstat (limited to 'arch/cris/arch-v10/kernel/head.S')
| -rw-r--r-- | arch/cris/arch-v10/kernel/head.S | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/cris/arch-v10/kernel/head.S b/arch/cris/arch-v10/kernel/head.S index 137bf52a5596..4a146e1749c9 100644 --- a/arch/cris/arch-v10/kernel/head.S +++ b/arch/cris/arch-v10/kernel/head.S @@ -168,13 +168,11 @@ _inflash: #endif ;; Set up waitstates etc according to kernel configuration. -#ifndef CONFIG_SVINTO_SIM move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0 move.d $r0, [R_WAITSTATES] move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0 move.d $r0, [R_BUS_CONFIG] -#endif ;; We need to initialze DRAM registers before we start using the DRAM @@ -466,7 +464,6 @@ no_command_line: move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG -#ifndef CONFIG_SVINTO_SIM move.d $r0,[R_GEN_CONFIG] #if 0 @@ -701,8 +698,6 @@ no_command_line: move.b $r0,[R_SERIAL3_TR_CTRL] #endif -#endif /* CONFIG_SVINTO_SIM */ - jump start_kernel ; jump into the C-function start_kernel in init/main.c .data |