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| author |   Jaedon Shin <jaedon.shin@gmail.com> | 2016-08-19 11:52:27 +0900 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2016-10-06 17:31:02 +0200 |
| commit | c707844d4b876f74f2adf036f98f6787d76d2905 (patch) | |
| tree | e3d04f74bd4a5eadc5a0c623cac287c866c60f9b /arch/mips/boot/dts/brcm/bcm7346.dtsi | |
| parent | MIPS: BMIPS: Add support PWM device nodes (diff) | |
| download | wireguard-linux-c707844d4b876f74f2adf036f98f6787d76d2905.tar.xz wireguard-linux-c707844d4b876f74f2adf036f98f6787d76d2905.zip | |
MIPS: BMIPS: Add support GPIO device nodes
Adds GPIO device nodes to BCM7xxx MIPS based SoCs.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14001/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/boot/dts/brcm/bcm7346.dtsi')
| -rw-r--r-- | arch/mips/boot/dts/brcm/bcm7346.dtsi | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi index eb7b19a32e3e..0105e4e5130b 100644 --- a/arch/mips/boot/dts/brcm/bcm7346.dtsi +++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi @@ -232,6 +232,43 @@ status = "disabled"; }; + aon_pm_l2_intc: interrupt-controller@408440 { + compatible = "brcm,l2-intc"; + reg = <0x408440 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <53>; + brcm,irq-can-wake; + }; + + upg_gio: gpio@406700 { + compatible = "brcm,brcmstb-gpio"; + reg = <0x406700 0x60>; + #gpio-cells = <2>; + #interrupt-cells = <2>; + gpio-controller; + interrupt-controller; + interrupt-parent = <&upg_irq0_intc>; + interrupts = <6>; + brcm,gpio-bank-widths = <32 32 16>; + }; + + upg_gio_aon: gpio@408c00 { + compatible = "brcm,brcmstb-gpio"; + reg = <0x408c00 0x60>; + #gpio-cells = <2>; + #interrupt-cells = <2>; + gpio-controller; + interrupt-controller; + interrupt-parent = <&upg_aon_irq0_intc>; + interrupts = <6>; + interrupts-extended = <&upg_aon_irq0_intc 6>, + <&aon_pm_l2_intc 5>; + wakeup-source; + brcm,gpio-bank-widths = <27 32 2>; + }; + enet0: ethernet@430000 { phy-mode = "internal"; phy-handle = <&phy1>; |