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| author |   Florian Fainelli <f.fainelli@gmail.com> | 2016-02-03 18:14:52 -0800 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2016-05-09 12:00:01 +0200 |
| commit | 904c3b4952fff6d9d7a5e26b27d4a194b8f538d4 (patch) | |
| tree | 1554456e2a813faa0c6dc54a4c27811a509f2748 /arch/mips/boot/dts/brcm/bcm97435svmb.dts | |
| parent | MIPS: BMIPS: Add missing 7038 L1 register cells to BCM7435 (diff) | |
| download | wireguard-linux-904c3b4952fff6d9d7a5e26b27d4a194b8f538d4.tar.xz wireguard-linux-904c3b4952fff6d9d7a5e26b27d4a194b8f538d4.zip | |
MIPS: BMIPS: Remove maxcpus from BCM97435SVMB DTS
Now that SMP properly works on 7435, do not restrict the number of core,
unleash them all.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: john@phrozen.org
Cc: cernekee@gmail.com
Cc: jon.fraser@broadcom.com
Cc: jaedon.shin@gmail.com
Cc: dragan.stancevic@gmail.com
Cc: jogo@openwrt.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12379/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/boot/dts/brcm/bcm97435svmb.dts')
| -rw-r--r-- | arch/mips/boot/dts/brcm/bcm97435svmb.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts index 1df088183523..68f486eba3f7 100644 --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts @@ -14,7 +14,7 @@ }; chosen { - bootargs = "console=ttyS0,115200 maxcpus=1"; + bootargs = "console=ttyS0,115200"; stdout-path = &uart0; }; }; |