diff options
| author |   Paul Burton <paul.burton@imgtec.com> | 2014-02-13 11:27:42 +0000 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:09:11 +0100 |
| commit | eec43a224cf198c7e3538fca16f689e4d17d4471 (patch) | |
| tree | 24d9236c0cd33dcf7862c09799910e8bbf5abde9 /arch/mips/kernel/traps.c | |
| parent | MIPS: Warn if vector register partitioning is implemented (diff) | |
| download | wireguard-linux-eec43a224cf198c7e3538fca16f689e4d17d4471.tar.xz wireguard-linux-eec43a224cf198c7e3538fca16f689e4d17d4471.zip | |
MIPS: Save/restore MSA context around signals
This patch extends sigcontext in order to hold the most significant 64
bits of each vector register in addition to the MSA control & status
register. The least significant 64 bits are already saved as the scalar
FP context. This makes things a little awkward since the least & most
significant 64 bits of each vector register are not contiguous in
memory. Thus the copy_u & insert instructions are used to transfer the
values of the most significant 64 bits via GP registers.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6533/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/traps.c')
0 files changed, 0 insertions, 0 deletions