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| author |   Christophe Leroy <christophe.leroy@c-s.fr> | 2018-11-29 14:07:05 +0000 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2018-12-04 19:45:01 +1100 |
| commit | 0356656284ca750f882b7eb81b9612bdbc90b2c4 (patch) | |
| tree | 4ab45f2bc268c053790962520b179365c16d35c1 /arch/powerpc/include/asm/hugetlb.h | |
| parent | powerpc/mm: enable the use of page table cache of order 0 (diff) | |
| download | wireguard-linux-0356656284ca750f882b7eb81b9612bdbc90b2c4.tar.xz wireguard-linux-0356656284ca750f882b7eb81b9612bdbc90b2c4.zip | |
powerpc/mm: replace hugetlb_cache by PGT_CACHE(PTE_T_ORDER)
Instead of opencoding cache handling for the special case
of hugepage tables having a single pte_t element, this
patch makes use of the common pgtable_cache helpers
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/hugetlb.h')
| -rw-r--r-- | arch/powerpc/include/asm/hugetlb.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h index 98004262bc87..dfb8bf236586 100644 --- a/arch/powerpc/include/asm/hugetlb.h +++ b/arch/powerpc/include/asm/hugetlb.h @@ -5,8 +5,6 @@ #ifdef CONFIG_HUGETLB_PAGE #include <asm/page.h> -extern struct kmem_cache *hugepte_cache; - #ifdef CONFIG_PPC_BOOK3S_64 #include <asm/book3s/64/hugetlb.h> |